Texas-instruments TMS320C6454 Instrukcja Użytkownika Pobierz pdf (Strona 198)

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PRODUCT PREVIEW

RMREFCLK

(Input)

RMREFCLK

(Input)

MTXD1-MTXD0,

MTXEN (Outputs)

TMS320C6454

Fixed-Point Digital Signal Processor

SPRS311A – APRIL 2006 – REVISED DECEMBER 2006

7.14.3.2 EMAC RMII Electrical Data/Timing

The RMREFCLK pin is used to source a clock to the EMAC when it is configured for RMII operation. The

RMREFCLK frequency should be 50 MHz ±50 PPM with a duty cycle between 35% and 65%, inclusive.

Table 7-81. Timing Requirements for RMREFCLK - RMII Operation (see Figure 7-65 )

-720

-850

NO. PARAMETER UNIT

-1000

MIN MAX

1 t

w(RMREFCLKH)

Pulse duration, RMREFCLK high 7 13 ns

2 t

w(RMREFCLKL)

Pulse duration, RMREFCLK low 7 13 ns

3 t

t(RMREFCLK)

Transition time, RMREFCLK 2 ns

Figure 7-65. RMREFCLK Timing

Table 7-82. Switching Characteristics Over Recommended Operating Conditions for EMAC RMII Transmit

10/100 Mbit/s

(1)

(see Figure 7-66 )

-720

-850

-1000

NO. PARAMETER UNIT

1000 Mbps

MIN MAX

1 t

d(RMREFCLKH-MTXD)

Delay time, RMREFCLK high to transmit selected signals valid 3 10 ns

(1) For RMII, transmit selected signals include: MTXD[1:0] and MTXEN.

Figure 7-66. EMAC Transmit Interface Timing [RMII Operation]

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