Texas-instruments TMS320C645x DSP Instrukcja Użytkownika Pobierz pdf (Strona 95)

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5.12 MAC Input Vector Register (MACINVECTOR)

EMAC Port Registers

The MAC input vector register (MACINVECTOR) is shown in Figure 40 and described in Table 40 .

Figure 40. MAC Input Vector Register (MACINVECTOR)

31 30 29 18 17 16

USER LINK Reserved HOST STAT

INT INT PEND PEND

R-0 R-0 R-0 R-0 R-0

15 0

RXPEND TXPEND

R-0 R-0

LEGEND: R = Read only; - n = value after reset

Table 40. MAC Input Vector Register (MACINVECTOR) Field Descriptions

Bit Field Value Description

31 USERINT MDIO module user interrupt (USERINT) pending status bit

30 LINKINT MDIO module link change interrupt (LINKINT) pending status bit

29-18 Reserved 0 Reserved

17 HOSTPEND EMAC module host error interrupt (HOSTPEND) pending status bit

16 STATPEND EMAC module statistics interrupt (STATPEND) pending status bit

15-8 RXPEND Receive channels 0-7 interrupt (RX nPEND) pending status bit. Bit 8 is receive channel 0.

7-0 TXPEND Transmit channels 0-7 interrupt (TX nPEND) pending status bit. Bit 0 is transmit channel 0.

SPRU975B – August 2006 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 95

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Texas-instruments TMS320C645x DSP Instrukcja Użytkownika Strona 95