Texas Instruments TMS320C6201 Instrukcja Użytkownika Strona 1

TMS320C6201Digital Signal ProcessorSilicon ErrataSPRZ153November 2000Copyright  2000, Texas Instruments Incorporated

SPRZ153TMS320C6201 Silicon Errata10DMA Paused During Emulation HaltAdvisory 3.1.6Revision(s) Affected: 3.1, 3.0, 2.1, and 2.0Details: When running an

SPRZ153TMS320C6201 Silicon Errata11Alternative: If a 64M-bit SDRAM is located in CE3, avoid using the last 1K byte in the CE3memory map (0x03FFFC00).C

SPRZ153TMS320C6201 Silicon Errata124 Silicon Revision 3.0 Known Design Exceptions to Functional SpecificationsEMIF: Inverted SDCLK and SSCLK at Speeds

SPRZ153TMS320C6201 Silicon Errata13EMIF: Inverted SDCLK and SSCLK at Speeds Above 175 MHz (Continued)2. On SBSRAM/SDRAM reads, data will be sampled on

SPRZ153TMS320C6201 Silicon Errata14EMIF: Inverted SDCLK and SSCLK at Speeds Above 175 MHz (Continued)Alternate Workaround: The following alternate wor

SPRZ153TMS320C6201 Silicon Errata155 Silicon Revision 2.1 Known Design Exceptions to Functional SpecificationsEMIF: CE Space Crossing on Continuous Re

SPRZ153TMS320C6201 Silicon Errata16EMIF: SDRAM Invalid Access (Continued)Workaround: Avoid use of multiple CE spaces of SDRAM within a single refresh

SPRZ153TMS320C6201 Silicon Errata17McBSP: DXR to XSR Copy Not Generated (Continued)Example:Configure the DMA as follows:(a) For half-word/byte-size a

SPRZ153TMS320C6201 Silicon Errata18McBSP: DXR to XSR Copy Not Generated (Continued)(c) For byte-size writes with right justification on receive data:–

SPRZ153TMS320C6201 Silicon Errata19DMA Channel 0 Multiframe Split-Mode IncompletionAdvisory 2.1.7Revision(s) Affected: 2.1 and 2.0Details: If DMA Chan

SPRZ153TMS320C6201 Silicon Errata2Contents1 Introduction 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SPRZ153TMS320C6201 Silicon Errata20McBSP: Incorrect mLaw Companding ValueAdvisory 2.1.11Revision(s) Affected: 2.1 and 2.0Details: The C6201 McBSP m-La

SPRZ153TMS320C6201 Silicon Errata21EMIF: HOLD Request Causes Problems With SDRAM RefreshAdvisory 2.1.14Revision(s) Affected: 2.1 and 2.0Details: If th

SPRZ153TMS320C6201 Silicon Errata22DMA Split-mode Receive Transfer Incomplete After PauseAdvisory 2.1.16Revision(s) Affected: 2.1 and 2.0Details: If t

SPRZ153TMS320C6201 Silicon Errata23PMEMC: Branch from External to InternalAdvisory 2.1.19Revision(s) Affected: 2.1 and 2.0Details: The program flow is

SPRZ153TMS320C6201 Silicon Errata246 Silicon Revision 2.0 Known Design Exceptions to Functional SpecificationsProgram Fetch: Cache Modes Not Functiona

SPRZ153TMS320C6201 Silicon Errata25Data Access: Parallel Accesses to EMIF or Internal Peripheral Bus Location Sequenced WrongAdvisory 2.0.5Revision(s)

SPRZ153TMS320C6201 Silicon Errata26McBSP New Block Interrupt Does Not Occur for Start of Block 0Advisory 2.0.9Revision(s) Affected: 2.0Details: When e

SPRZ153TMS320C6201 Silicon Errata27McBSP: XEMPTY Stays Low When DXR Written LateAdvisory 2.0.13Revision(s) Affected: 2.0Details: XEMPTY goes low and s

SPRZ153TMS320C6201 Silicon Errata28EMIF: Data Setup TimesAdvisory 2.0.19Revision(s) Affected: 2.0Details: The data setup time for the external memory

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SPRZ153TMS320C6201 Silicon Errata3Advisory 2.1.19 PMEMC: Branch from External to Internal 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SPRZ153TMS320C6201 Silicon Errata41 IntroductionThis document describes the silicon updates to the functional specifications for the TMS320C6201 silic

SPRZ153TMS320C6201 Silicon Errata51.2 Revision IdentificationThe device revision can be determined by the lot trace code marked on the top of the pack

SPRZ153TMS320C6201 Silicon Errata62 Changes to the TMS320C6201 Data Sheet (literature number SPRS051)Table 2. Timing Requirements for Interrupt Respon

SPRZ153TMS320C6201 Silicon Errata7Figure 3. SBSRAM Write Timing (1/2 Rate SSCLK) (See Note)BE1BE2BE3BE4A1 A2 A3 A4Q1Q2Q3 Q416151091413654321SSCLKBE_ [

SPRZ153TMS320C6201 Silicon Errata83 Silicon Revision 3.1 Known Design Exceptions to Functional SpecificationsIssues When Pausing at a Block BoundaryAd

SPRZ153TMS320C6201 Silicon Errata9DMA Multiframe Split-mode Transfers Source Address Indexing Not FunctionalAdvisory 3.1.3Revision(s) Affected: 3.1, 3