Texas Instruments TAS5508-5142K7EVM Instrukcja Użytkownika Pobierz pdf (Strona 13)

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2.6 Digital Audio Interface (J60)

Digital Audio Interface (J60)

The digital audio interface contains digital audio signal data (I

S), clocks, etc. Please see the TAS5508B

Data Manual for signal timing and details not explained in this document.

Table 2-8. J60 Pin Description

PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION

1 GND Ground

2 MCLK Master clock input. Low jitter system

clock for PWM generation and

reclocking. Ground connection from

source to TAS5508B must be a low

impedance connection.

3 GND Ground

4 SDIN1 I

S data 1, channel 1 and 2

5 SDIN2 I

S data 2, channel 3 and 4

6 SDIN3 I

S data 3

7 SDIN4 I

S data 4

8 — Reserved

9 — Reserved

10 GND Ground

11 SCLK I

S bit clock

12 GND Ground

13 LRCLK I

S left-right clock

14 GND Ground

15 — Reserved

16 GND Ground

SLEU071 – June 2006 System Interfaces 13

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Texas Instruments TAS5508-5142K7EVM Instrukcja Użytkownika Strona 13