Texas Instruments TMS320DM355 Instrukcja Użytkownika Strona 145
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PRODUCT PREVIEW
5.16 Pulse Width Modulator (PWM)
5.16.1 PWM0/1/2/3 Electrical/Timing Data
PWM0/1/2/3
1
3
3
2
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
The DM355 contains 4 separate Pulse Width Modulator (PWM) modules. The pulse width modulator
(PWM) feature is very common in embedded systems. It provides a way to generate a pulse periodic
waveform for motor control or can act as a digital-to-analog converter with some external components.
This PWM peripheral is basically a timer with a period counter and a first-phase duration comparator,
where bit width of the period and first-phase duration are both programmable. The Pulse Width Modulator
(PWM) modules support the following features:
• 32-bit period counter
• 32-bit first-phase duration counter
• 8-bit repeat count for one-shot operation. One-shot operation will produce N + 1 periods of the
waveform, where N is the repeat counter value.
• Configurable to operate in either one-shot or continuous mode
• Buffered period and first-phase duration registers
• One-shot operation triggerable by hardware events with programmable edge transitions. (low-to-high or
high-to-low).
• One-shot operation triggerable by the CCD VSYNC output of the video processing subsystem (VPSS),
which allows any of the PWM instantiations to be used as a CCD timer. This allows the DM355 module
to support the functions provided by the DM320 CCD timer feature (generating strobe and shutter
signals).
• One-shot operation generates N+1 periods of waveform, N being the repeat count register value
• Configurable PWM output pin inactive state
• Interrupt and EDMA synchronization events
Table 5-46. Switching Characteristics Over Recommended Operating Conditions for PWM0/1/2/3
Outputs
(1)
(see Figure 5-47 and Figure 5-48 )
DM355
NO. PARAMETER UNIT
MIN MAX
1 t
w(PWMH)
Pulse duration, PWMx high P ns
2 t
w(PWML)
Pulse duration, PWMx low P ns
3 t
t(PWM)
Transition time, PWMx .05P ns
4 t
d(CCDC-PWMV)
Delay time, CCDC(VD) trigger event to PWMx valid 10 ns
(1) P = MXI1/CLKIN cycle time in ns. For example, when MXI1/CLKIN frequency is 24 MHz use P = 41. 6 ns.
Figure 5-47. PWM Output Timing
Submit Documentation Feedback Peripheral Information and Electrical Specifications 145
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